1. Field of Industrial Use
This invention relates to a sample and hold circuit which may be used, for example, as a liquid crystal panel driving circuit of a television receiver.
2. Description of the Prior Art
Liquid crystal television receivers employing liquid crystal panels as display elements have been developed recently. To begin with, the outline of operation of this liquid crystal television receiver is described below.
FIG. 4 shows a general construction of a liquid crystal television receiver. Television signals sent from a broadcasting station are received by an antenna 1, and are converted in frequency by a tuner 2 to an intermediate frequency. The television signals converted into an intermediate frequency are amplified and detected in a signal processing circuit 3, and audio signals and video signals are obtained. The audio signals are delivered to a speaker 5 by way of an audio output circuit 4, while video signals are applied to a chroma stage 6. The chroma stage 6 comprises a chroma processing unit and chroma output unit, and the video signals are demodulated into R, G, B signals in the chroma processing unit, and are converted into signals inverted in the polarity in every field by the chroma output unit to be applied to a Y driver IC 9. The video signals applied to the Y driver IC 9 are sampled and held, and are applied to the source line of an active matrix type liquid crystal panel 8. At the same time, the video signals are added to a control unit 7, in which various control pulses are obtained, and are applied to the control signal input terminals of X driver IC 10 and Y driver IC9. The X driver IC 10 is intended to scan in the vertical direction, and its output is applied to the gate line of the active matrix type liquid crystal panel 8. Thus, by the vertical direction scanning pulses from the X driver IC 10 and video signals from the Y driver IC 9, a television picture is obtained on the active matrix type liquid crystal panel 8.
Referring now to the outline of the operation of the Y driver IC 9 shown in FIG. 4, an example of the composition of the Y driver IC is shown in FIG. 5. The R, G, B signals from the chroma stage are applied to R, G, B terminals, and are changed over in every horizontal period by an analog multiplexer 11 to be fed into three video signal lines 12. The analog multiplexer 11 changes over according to the R, G, B picture element arrangement on the liquid crystal panel. Numeral 13 denotes a shift register, which receives a clock .phi..sub.Y and start pulse S, and delivers sampling pulses Q.sub.1, Q.sub.2 and so forth sequentially. Numeral 14 denotes a sample and hold circuit and operational amplifier, which are designed to sample the video signals from the video signal line 12 according to the sampling pulses Q.sub.1, Q.sub.2 and so forth from the shift register, and hold them according to the pulses G.sub.1, G.sub.2 applied from outside. The outputs of the sample hold circuit and operational amplifier 14 are connected to output terminals Y.sub.01, Y.sub.02, . . . . of the Y driver IC, and these output terminals are connected to the source line of the active matrix liquid crystal panel.
One block (the n-th) of the sample and hold circuit and operational amplifiers in FIG. 5 are shown in FIG. 6, in which numeral 15 denotes a video signal line, and 16 to 20 are switching circuits which operate by turning on when a pulse of the signal indicated by each arrow is a high level, and turning off when it is a low level. Numeral 16 is a switching circuit for video signal sampling, and its output is applied to two input switching circuits 17 and 18, and hold capacitors 22 and 23 are respectively to the output terminals of the input switching circuits 17 and 18, while output switching circuits 19 and 20 are respectively connected to the output terminals of the hold capacitors 22 and 23. Output terminals of these two output switching circuits 19 and 20 are coupled together, and are connected to the input terminal of an operational amplifier 21 having an input capacity 24, and the output terminal of the operational amplifier 21 becomes output terminal Y.sub.0n of Y driver IC, and is connected to the source line of the liquid crystal panel.
In thus composed sample and hold circuit, the operation is as described below.
Waveforms of the sample and hold circuit and operational amplifier in FIG. 6 are shown in FIG. 7, in which V is a video signal applied to the video signal line 15, and in which one horizontal period is represented by 1H. G.sub.1, G.sub.2 are control pulses applied to switching circuits 17 to 20 of the sample and hold circuit the period of both G.sub.1 and G.sub.2 is 2H, and their phases differ by .pi.. In order to perform the sample and hold securely, there is a period t in which both G.sub.1 and G.sub.2 are off. The period in which either G.sub.1 or G.sub.2 is on is indicated by t.sub.1, t.sub.2, . . . . The signal Q.sub.n is an n-th output pulse of the shift register 13, and it is a video signal sampling pulse used to open or close the switching circuit 16. V.sub.na and V.sub.nb are information voltage waveforms whose values are held by hold capacitors 22 and 23, and Y.sub.0n is an n-th output waveform of Y driver IC. In the period t.sub.1, G.sub.2 is on and G.sub.1 is off, so that the information voltage V.sub.na of hold capacitor 22 is transmitted to the output Y.sub.0n of Y driver IC, and video information voltage V.sub.nb is sampled and held in the hold capacitor 23 by the sampling pulse of Q.sub.n. Next, in the period t.sub.2, when G.sub.1 is on and G.sub.2 is off, the information voltage V.sub.nb which has been sampled in the t.sub.1 period is transmitted to the output Y.sub.0n of Y driver IC, while the video information voltage V.sub.na is sampled and held in the hold capacitor 22 by the sampling pulse Q.sub.n. Thereafter, in the period of t.sub.3, t.sub.4 and so forth, the operations in the period of t.sub.1 and t.sub.2 are similarly repeated.
In this composition, however, there were following problems. That is, the input capacity 24 is always present at the inside side of operational amplifier 21, and when the operational amplifier is composed of CMOS elements, in particular, the value of input capacity is considerably large. As compared with the values of hold capacitors 22 and 23, the value of the input capacity 24 of the operational amplifier is generally too great to be ignored, and, therefore, when the output side switching circuits 19 and 20 are turned on, the voltage being held by the hold capacitors 22 and 23 is influenced by the electric charge 1H before which was accumulated in the input capacity 24 of the operational amplifier 21 in the output Y.sub.0n of Y driver IC, so that the input voltage may not be delivered at a high fidelity. In the example shown in FIG. 7, the vaue of Y.sub.0n in the t.sub.2 period, which should be the voltage of the same level as in the period t.sub.3 as indicated by dot-dash line, is actually an upward shifted output voltage due to the effect of the operational amplifier input voltage in the period t.sub.1. The above operation is explained in the two-system construction of a sample and hold circuit, but the same holds true in a one-system construction of a sample and hold circuit. Hence, the problem is, when the conventional sample and hold circuit and operational amplifier as shown in FIG. 6 are used, for example, in a liquid crystal television, brightness changes occur where the brightness should be the same.
In the light of the above-discussed problem, this invention is intended to present a sample and hold circuit which is capable of eliminating the adverse effects of the capacity component if the capacity component is present at the output side.